EMC test method of IC integrated circuit chip

It is important that users of IC integrated circuits can compare various types of ICS based on their EMC parameters. This makes it possible to choose the best IC, and means that the layout design and device can be consistent with the EMC parameters of the IC.

For IC manufacturers, the good EMC characteristics of their products mean that they are superior to competitors. Therefore, the goal is to determine those parameters that play a decisive role in EMC immunity and radiation, and allow engineers to draw conclusions for chip design.

References：Introduction to EMC test standards for IC integrated circuits

Current popular IC test methods

Now, with reference to human body models, it is common for the ESD intensity of electronic components (IC, transistor) to refer to values of 1 to several kV in the specifications. For the human body model (HBM), the capacitor (100 pF) is charged at the test voltage and discharged on the device under test through 1500 ohms. HBM is described in the standards MIL-STD-883G and IEC 801-2. The machine model (MM) is a further test model that works on the same principle.

These two models are only used to verify the destructiveness of the IC when handling components during production, packaging, transportation, and assembly. During the MM or HBM test, the test object is never connected to the voltage, that is, it is not running.

The ESD intensity specified according to the human body model has nothing to do with the ESD behavior during operation. In fact, the protection mechanism designed for the human model (regardless of faults during operation) may even cause the IC to fail or fail during the functional interference test.

Work on EMC standards, test methods and limits for IC is currently under way.

The EMC requirements for equipment (resources and equipment) have been defined in standards, test methods, and limits. These devices are ESD and burst tested (IEC standard 61000-4-2/61000-4-4), and the test voltage is in the kV range.

The ICS and other semiconductors used in the equipment are ultimately the cause of interference with emission and lack of immunity.

The interference emitted by the IC can be measured at its interface, and evaluated and defined on the basis of these measurements.

The IC has low immunity to interference, and its immunity level is in the volt range.

The pulse voltage introduced outside the device during standard testing will attenuate as it reaches the IC. The voltage of a few kV outside the device is reduced to a voltage of approximately 1... 100 V at the IC pin. These voltages may exceed the immunity level of the IC. This means that compared with device testing, the test voltage of the IC must be in the range of 1 to several hundred volts, not in the kV range. Only a few exceptions (special equipment) require a higher test voltage.

New IC EMC test system

IC EMC test system (Figure 1andFigure 2) Can be used to analyze the behavior of the IC under the selective influence of (conduction and radiation) interference and/or corresponding emission. The insights gained from this analysis help semiconductor manufacturers optimize their ICS and IC users overcome weaknesses in their electronic modules.

The test IC is tested in use.

IC test system allows IC users：

• Identify EMC problems in equipment at the IC level
• Choose the IC and the IC based on the insights gained
• Optimize the circuit and/or layout design according to the EMV parameters of the IC.

The IC test system enables IC manufacturers to：

• Measure and check the immunity/radiation of the IC
• Determine the cause of interference and
• Optimize IC

Different probe groups are required (Figure 3) To determine various EMC parameters. Users can select the probe group according to the field of use (including RF, EFT, ESD, DPI, emission, ohm method...).

The ICE1 IC test environment needs to be the best test environment for the probe set：

• A test board used to test the IC, providing a unified interface between the test IC and the test system
• CB 0708 connection board for triggering test IC
• GND25 ground plane that provides a unified reference potential
• In addition, depending on the probe group and the corresponding work, external equipment may be required：
• Interference generator (e.g. EFT/burst)
• Oscilloscope
• Spectrum analyzer
• Personal computer
• Power amplifier

The IC under test is located on the test board in the test device. The filter connection connects the test board to the CB 0708 connection board located below it, which connects the test IC to the PC. The included software can be used to control and monitor the IC. The connecting plate is integrated in the ground plane to form a fixed ground reference system for testing. The probes in the probe group are placed on the ground plane and are used to inject interference into the test IC or measure its emission through conductive or capacitive/inductive coupling. According to their respective types, the probe group is powered and controlled by an external interference generator (RF, EFT/burst), a spectrum analyzer, or a burst power station (BPS) of Langer-EMV.

The burst power station is included as an accessory in some probe groups. The pulse voltage, pulse frequency and polarity of the probe can be modified through the included BPS-Client control software.

EMC parameters of IC

Each IC has characteristic immunity related to conducted and radiated interference. These are its EMC parameters. The IC pins have conduction immunity and can be measured using the corresponding probes in the probe group.

The entire IC has radiation immunity. The interference field can affect the IC from the outside and exceed the immunity of these to magnetic and electric fields. These immune levels are independent of each other. A probe that produces a suitable and defined field is needed to determine the level of field immunity.

In addition, the conducted interference emission of the IC can be measured through the pin, and the radiation (electrical and magnetic near-field) emission can be measured through the IC housing. The measured curve can be used to analyze the EMC parameters of the IC.

Setup of IC test system

The IC under test is located on the test board in the test device. The filter connection links the test board to the connection board located below it, which connects the test IC to the PC. The included software can be used to control and monitor the IC. The connecting plate is located on the lower side of the ground plane, forming a fixed ground reference system for measurement. The probe is placed on the ground plane and is used to inject interference into the test IC or measure its emission through conductive or capacitive/inductive coupling. The measurement connection is made by the pin of the probe coming into contact with the pin under test of the test IC. This small-scale setup and continuous ground plane ensure that the measurement can also be carried out in the GHz range.

Definition of IC EMC test method

The EMC immunity and emission mechanism in the equipment must be analyzed. The test methods of all interference variables (RF, ESD, EFT, emission, RF emission...) are derived from this analysis.

IC EMC anti-interference test

The test method of the device generates an electric and magnetic field in the device under test. These fields affect the network of printed circuit boards leading to the IC and the IC housing. The field acting on the network will generate current and voltage in these networks, and these currents and voltages will affect the connected IC.

IC test generators usually have to simulate these electrical and magnetic parameters.Figure 6Shows the basic settings of the burst or ESD test bench. Inject the device under test u _G The test pulse of (t) generates a current pulse i(t) flowing through the device. This will cause a voltage drop D in the device _u (t). The voltage drop D _u (t) The electric field intensity E(t) is generated in the device. The current i(t) generates a pulsed magnetic field H(t) in the device. These fields have indirect effects on the externally connected conductor rail (conduction) on the IC or directly on the IC housing (radiation).

IC EMC interference emission test

The switching mode IC generates internal RF current and voltage. These in turn will produce an electric or magnetic field RF field that escapes directly from the IC housing. In addition, RF voltage and current can be transmitted to the IC pins and therefore to the network outside the IC on the printed circuit board, where they generate radio frequency and/or radio frequency fields. The electric field E is composed ofIn Figure 7The IC and the external network of the IC are generated. The electric field couples to the adjacent component and stimulates it to emit interference. In this case, the EMC parameters of the IC are the electric field intensity emitted by the IC and the electrical parameters current and voltage (emitted by the IC) that are stimulated by the external network of the IC.

A suitable system (probe set) must be used to measure the electric and magnetic field parameters of the IC housing, as well as the radio frequency current and voltage of the IC pins. These are the characteristics of the IC.

IC EMC magnetic/inductive coupling test

The pulsed interference current flowing through the circuit board will produce a pulsed magnetic field. These magnetic fields B _StCan be coupled to the conductor loop and sense the interference voltage u _St。 The pulsed magnetic field can interfere with the function of the IC in two ways (Figure 8）：

The induced voltage affects the IC pin that is used as the input switch. The interference voltage uSt is converted into a stray signal by the input circuit in the IC and further processed into a logic signal.

Induced voltage drives interference current i _StEnter the pin of the IC. If these are Vdd/Vss pins, this interference current will directly enter the IC's internal Vdd/Vss system. However, it can also be entered through the signal pin and directed to the Vdd/Vss system inside the IC through an internal driver or protection diode or capacitor. The Vdd/Vss system transmits interference current to other functional components of the IC, so areas that are not functionally connected to the affected pins may fail.

IC EMC electrical/capacitive coupling test

The module may be exposed to several pulsed electric fields of 10,000 V/m (the test settings are based on IEC 61000-4-4), which will also affect the circuit board network (Figure 9). The displacement current D flows around through the parasitic capacitance of the line. The IC connected to the line will be affected in two ways：

The network essentially has circuit elements R, L, and diodes for Vdd and Vss in circuit boards and ics. The displacement current generates interference pulses on these components u _St。 This interference pulse is converted into a parasitic signal by the input circuit in the IC and further processed as a logic signal.

The displacement current is divided into two parts. The first part discharges through the equivalent circuit of the circuit board and any decoupling capacitors that may exist. The second part of the interference current i _StIt flows through the IC through the driver or protection diode to reach the Vdd/Vss system. It produces an effect similar to magnetic field coupling.